Sandman
04-15-2006, 04:38 PM
Intel corporation has showcased a Clovertown prototype at its developer forum Taipei, Taiwan. Running at 2.0GHz, the chip has two dies, each containing two cores and 4MB of unified L2 cache, for a total of 4 execution cores and 8MB L2 cache.
The chips will be manufactured using a 65nm process size and are scheduled to begin shipping to computer manufacturers late this year, hitting the market early 2007.[---] Intel had showcased Clovertown prototypes earlier this year, but did not reveal any details concerning the architecture at that time.
The Cinebench numbers for Clovertown are also very impressive, with the four core beast achieving a score of 1723. The same chip, with only one core enabled, scored 362. The chip is not meant to be run in multiprocessor motherboards with more than 2 sockets, but Intel is working on a similar CPU, Tigerton, which will support 4 and 8 processor configurations.
Source: X-bit (http://www.xbitlabs.com/news/cpu/display/20060415072338.html) and ZDnet (http://news.zdnet.co.uk/hardware/chips/0,39020354,39252114,00.htm)
The chips will be manufactured using a 65nm process size and are scheduled to begin shipping to computer manufacturers late this year, hitting the market early 2007.[---] Intel had showcased Clovertown prototypes earlier this year, but did not reveal any details concerning the architecture at that time.
The Cinebench numbers for Clovertown are also very impressive, with the four core beast achieving a score of 1723. The same chip, with only one core enabled, scored 362. The chip is not meant to be run in multiprocessor motherboards with more than 2 sockets, but Intel is working on a similar CPU, Tigerton, which will support 4 and 8 processor configurations.
Source: X-bit (http://www.xbitlabs.com/news/cpu/display/20060415072338.html) and ZDnet (http://news.zdnet.co.uk/hardware/chips/0,39020354,39252114,00.htm)