PCI-Express Scaling, redux?

lemonadesoda said:

This review is very interesting, but what it misses in the discussion is the interaction of PCI-E bandwidth, memory bandwidth, and chipset. The reason is that x16 2.0 is getting very close to memory bandwidths, give or take all the overhead and data marshalling.

W1z is getting some difference in performance on his highly OC rig where memory bandwidth >> PCI-E bandwidth, so that it is the PCI lane that is causing a potential bottleneck.

BUT for a regular DDR2 or DDR3 non-OC extreme edition, the difference would be much smaller still. So while it is nice to see OC figures to the max, it may also misrepresent the true behaviour for the regular user.

Furthermore, if you have SLI crossfire system, the results WILL NOT scale in the same way. Why? Because the bandwidth needed to fill 2x PCI-x16 2.0 lanes simultaneously is getting pretty close to memory bandwidth, esp. with all the data-marshalling going on in the chipset.

I would like to encourage w1z to do a follow-up to his otherwise most excellent review:

1./ I would really like to see the results at stock.
2./ Do a test with SLI/crossfire. The whole x8 x16 discussion is moot without putting into real context. The results will not scale in the same way as the single card set up... so therefore the results of the single card setup are irrelevant to the discussion about SLI/Crossfire performance under x4, x8 or x16
3./ By all means, do a sensitivity analysis on how OC'ing improves the results, or indeed worsens them from a relative perspective
4./ But also see how the results change by increasing/decreasing memory bandwidth by dropping a memory channel or two
5./ As 1 but do the test on a similarly clocked dual xeon system with memory channel bandwidth to the max, and see how much the results pull away compared with 1.

I think the results 5 vs. 1 vs. the original would be a very interesting comparative and help enthusiasts see the value of dual xeons vs single CPU vs x4 x8 x16 vs. SLI/Crossfire.

Click to expand...