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AMD Propus and Regor Die Sizes Surface?
The years 2007 and 2008 have been quite tough for AMD when it came to client CPU market. Its Barcelona K10 "Stars" micro-architecture, while not being able to lead Intel technologically, eventually got implemented into various processor SKUs. AMD carved several triple-core and dual-core processors out of a standard K10 die design by changing the count of available processing cores.
With the upcoming 45nm Phenom II and Athlon series, AMD is planning two primary die designs: those with the L3 cache, and those without. Sources suggest that AMD won't be carving out dual-core chips by disabling two cores from a quad-core die (for the Regor core). This is indicated by the estimated die sizes of some of the 45nm AMD desktop cores according to Macadamia from XtremeSystems. The Deneb core is sized at 243 sq. mm, with 140 sq. mm for the Propus core, followed by ~80 sq. mm for Regor. The die-size difference between the Deneb and Propus cores comes from the fact that the former carries a large 6144 KB L3. A lot can be inferred from these die-sizes. Ideally for the smaller core (Propus), the L3 cache is physically lacking, and not merely present but disabled. This could result in the chip having a lesser energy draw. AMD has a string of product-launches in the first half of 2009, that includes the Propus core under the Athlon X4 banner. ![]() Source: XtremeSystems |
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#2 |
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Many Thanks to cdawall for sending this in.
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#3 |
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how much is an intel core 2 die size (you get the question but i am studyin english)
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#4 |
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These cacheless versions will end up in OEM builds for cheap systems.
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#5 |
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Bird of Prey
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So no L3 cache is the only difference?
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#7 |
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#8 |
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so i wonder if the cacheless versions will clock any higher...
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#9 |
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I just hope they don't butcher processors like they did with Phenom. If you have such low yields with quad-core production that it is actually a good idea to sell tri-core and dual-core processors, there was an epic-fail in design and engineering. A whole lot of money is lost in major mishaps like that because they are still paying for quad-core's regardless of what does or doesn't work.
If AMD starts doing the same thing with Phenom II, AMD won't be competitive with Intel for at least another two years. They have to get those bugs fixed--have to. If it means starting over from scratch, then that is what they need to do. They can't keep building off a platform that is second-rate in performance and dismal in production yields. It will be the end of them if they believe they can. Cacheless (as in constructed without the L3 in the first place) should be able to go faster because it is less complex. It should also be able to operate using less volts because the physical dimensions are smaller.
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#10 |
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^^ Initially yields were low with the 1st quads, but AMD does always claim they have higher yields than intel on a mature process (also took them a bit to stock up tri-cores it seems). They are most definitely getting higher yields in 45nm than intel (i7).
There is no starting from scratch. They have to stick with the plan. It just failed with phenom. AMD has to wait until bulldozer is ready. Everything works in parallel.
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#11 | |
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With these Die Sizes being Different, the Dual Core/Tricore would Be Similar to the Allendale Parts (nothing wasted like on Conroe) Thus should allow them to get greater yields vs the Phenom 1
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#12 |
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no the phenom x4 and x3 also have L3 cash
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#13 |
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I am just waiting to see if they are actually going to be any good.....I would really like to switch back to AMD since I was kind of brought up on them (OK yes, at my age I was brough up on the mechanical Abacus attached to a hamster wheel!) but some speculation I have read suggests they might be close to i7 in performance terms, others say they wont even keep up with current Intel 45nm Yorkfields, I hope the former but I fear the latter
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#14 |
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I'd expect the latter. All they're really doing is a die shrink which usually only means lower voltage and potentially higher clocks. It doesn't side like there is much changing on the architectural front.
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